/19
Macro FIO-DEC part 2
/punch binary block
pun, lac org
sad loc
jmp bnp
lac pch
spq
jmp bnp
cli
repeat 5, ppa
lac org
add (dio
dac ck1
jda pnb
lac loc
add (dio
jda pnb
load t,dac pbf
pub, lac i t
jda pnb
lac i t
add ck1
dac ck1
idx t
sas ts
jmp pub
lac ck1
add loc
add (dio
jda pnb
/form origin for next block
bnp, lac wrd
and (407777
dac org
b3, dac loc
init ts, pbf
bs, jmp .
loc, 0
/20
/pseudo-instruction start
sta, lac mii
ior rqc
spa
jsp ils
init bt,ilf
dap qt
dap ct
init tt,s
jmp r2
s, lac pss
spa
jmp 1st
jsp evl
spi
jmp uss
s2, move wrd,tcn
init bs,s4
move loc,wrd
jmp pun
s4, init sov,np2
hlt+cla+cli+clf+6-opr-opr-opr
lac pch
spa
jmp s6
law i 40
jda fee
lac tcn
add (jmp
jda pnb
law i 240
jda fee
s6, init sov,np2
lio (-0
hlt+clc+stf+6-opr-opr
jmp ps1
1st, init sov,np2
hlt+cla+cli+stf+6-opr-opr-opr
/ pss flg 6 tag
/ -0 0 s5
/ 1 0 s4
/ -0 1 1st
/ 1 1 s6
/21
/initialize for new pass
ps2, law 1
dac pss
dac pch
dac tit
move ini,inp
ps4, move psb,psi
lac mai
move psa, mai
jmp np1
ps5, /initial entry
ps3, move mai,psa
move psi,psb
s5, init sov,ps2
clc
dac pss
hlt+cli+clf+6-opr-opr
ps1, clc
dac pss
dac pch
law 1
dac ini
init rlm,flx
move psi,psb
lac mai
dac psa
np1, dac hih
add (sad-lac+1
dac con
dac nco
dzm nca
clc
dac asi
law 4
dac org
dac loc
law 1
dac mii
dzm vai
dzm vct
load n1, opr
init cn6,cor
init cn7,cr2
/22
np2, init rlj,rlm
setup t,7777
rrb
rpa-i
cks
ril 1s
szs i 50
spi
jmp np3
isp t
jmp .-6
hlt+clc+cli-opr-opr
jmp np2
np3, dzm api
dzm fwd
init ts,pbf
init rc8,flx+nfw+2
dzm rqc
init dtc,tt
clc+clf 7+cli-opr-opr
add pss
add pch
add tit
sas (3
stf 5
/23
/print and punch title
pte, law i 40
szf i 5
jda fee
jmp ptl+1
ptl, iot i /sync on typewriter
jsp rch
sad (13 /stop code
jmp rch+1
sza
jmp pt0
szf i 6
jmp rch+1
pt0, sad (77
jmp pt5
stf 6
sad (40
stf 5
ral 1s
add (ftp
dap pt2
dap pt3
idx pt3
pt1, lio t
iot 4003 /tyo with nac but no ioh
szf 5
jmp ptl
pt2, lac .
repeat 3, jda pt6
pt3, lac .
repeat 3, jda pt6
jmp ptl
pt6, 0
dap pt7
lac pt6
cli
rcl 6s
ppa
pt7, jmp .
pt5, szf i 6
jmp ptl+1
dzm tit
/24
/print pass 1 and 2
pps, jsp spc
lac (723554 /lc,red, -
jda tys
jsp spc
lac (flex pas
jda tys
tyo
jsp spc
law 1 / 1
add pss
jda tys
law 3477 /black carret
jda tys
/punch input routine
law i 1
add pss
add pch
spq
jmp rst
pf2, law i 40
jda fee
lac inp
spq
jmp rst
pi2, load pt6,dio 7751
pi3, lac pt6
jda pnb
lac i pt6
jda pnb
index pt6,(dio 7776,pi3
lac (jmp 7751
jda pnb
dzm inp
jmp pf2
spc, dap .+3
cli
tyo
jmp .
/25
/pseudo instruction terminate
ter, lac mii
spq-i
jsp ilf
lac tlo
dac loc
clc
dac asi
law 1
dac mii
lac dm3
dap psi
jsp sco
jsp sco
jsp sco
jsp sco
lio scw
jmp .+2
ril 1s
isp scn
jmp .-2
dio i sc3
jmp rst
/26
/pseudo instruction define
dfn, lac mii
spq
jsp ilf
law ilf
dap qt
dap ct
law df1
dap tt
law df2
dap bt
lio loc
dio tlo
dzm loc
clc
dac asi
dac mdi
idx mai
dap dm3
idx mai
dap dm1
idx mai
dap dm2
sub low
sma
jmp sce
jmp rnw
df1, jsp sch
jmp r
jsp ilf
df2, jsp sch
jmp itc
jsp ilf
/27
/define macro instruction
dmi, lio api
dm3, dio .
lio syn
dm1, dio .
clc+clf 4-opr /liu
dac mii
dzm scw
law 1
dac mdi
lac psi
dm2, dac .
idx mai
dap sc3
law i 23
dac scn
init prs, pdl
init dsk, dsm+1
init ddx, rsk
init ct, pd1
init tt, pds
jmp r2
/pick up dummy symbol
pds, law rst /tab
dap ddx
lac chc
spq
jmp rst
pd1, lac sym /comma
jda per
dac sym
szf 5 /syl
jmp pd2-1
lac let
sza i
jmp pd2-1
szf i 4 /liu
jsp ids
pd2, lio sym
jmp dd+1
/28
/search for dummy symbol
sds, 0
dap sdx
dap sdy
idx sdy
init sd1,dsm
sd2, lac sds
sd1, sad xy
jmp sd4
index sd1,dsk,sd2
lio sds
sdx, jmp xy
sd4, lac sd1
sub (sad dsm-1
sdy, jmp xy
/define new dummy symbol
dd, dap ddx
dio i dsk
idx dsk
sad (sad dsm+nds-1
jsp tmp
sub (sad dsm
ddx, jmp .
/macro instruction constant
mc, dap tea
dzm num
stf 6 /dsi
jsp ss
jsp sco
jsp sco
mca, law smb
jmp scz
/macro instruction storage word
sw, jsp sch
jmp rnw
jsp evl
sma+spi-skp
jsp usm
sw2, law rnw
mw, dap tea
idx aml
idx loc
law mca
jmp ss
/29
/dummy symbol assignment
da, szf i 4 /liu
jsp ilf
szf 5 /syl
jsp ipa
lac sym
jda per
dac tcn
init bt,ilf
dap qt
dap ct
init tt,da1
jmp rnw
da1, jsp sch
jmp rnw
jsp evl
sma+spi-skp
jsp usd
da3, lac tcn
jda sds
jmp dab
add (400000
daa, jda mp
jmp rst
mp, 0
dap mpx
jsp ss
jsp sco
jsp sco
jsp sco
jsp scz
init tea,mp1
jmp smb
mp1, lac mp
jda wro
mpx, jmp xy
dab, law daa /if undef
jmp dd
/30
/macro instruction usage
mac, dap aw
move dsk,dsl
init bt,ilf
dap qt
dzm tcn
init tt,aev
init ct,ae1
init ae6,rsk
init ae4,dsv
clear dsv,dsv+nds-1
lac loc
dac dsv
lac mii
sma
jmp r2
clear dss+1,dss+nds-1
ma1, jmp r2
/evaluate macro instruction arguments
aev, init ae6,am
ae1, jsp evl
sma+spi-skp
jsp usp
ae3, idx ae4
add (dss-dsv
dap ae5
sad (dio dss+nds-1
jsp tmp
lio wrd
ae4, dio xy /dsv
szf i 6 /dsi
jmp ae5-1
lac mii
spq
jmp ae7
clc
ae5, dac xy
ae6, jmp xy
ae7, cli
jsp dd
dac i ae5
jda mp
jmp ae6
/31
/assemble M-I into program
am, lac pss
dac def
init prs,pdl
ami, clf 6 /dsi
dzm wrd
am1, law awm
jda tc
law as
jda tc
law ac
jda tc
law aa
jda tc
am5, lac dsl
dap dsk
jmp rst
/assemble M-I storage word into progr. or mai
awm, law aw3
ar, dap ary
law ar5
jda tc
law ar1
rw, dap rwx
aw, lio xy /mai
idx aw
dio t
lac t
rwx, jmp xy
ar1, jda ed
ar5, lio mii
ary, jmp xy
aw3, law ami
spi
jmp mw
dap bs
jmp tb3
/32
/assemble argument (dummy symbol) into M-I word
as, jsp rro
add (dsv-1
dap as5
add (dss-dsv
dap as8
and (777000
dac tc
lio (cma
sma
lio (opr
dio as6
lio mii
spi i
jmp as5
as8, lac xy /dss
szm
jmp as7
as5, lac xy /dsv
as6, xx /sgn
jda ed
jmp am1
as7, xor tc
jda pr
lac i as8
sas one
jmp am1
jmp as5
/33
/assemble constant
ac, jsp ar
law ac1
spi
jmp mc
jsp co
dac wrd
law ami
sv, dap svx
jsp rro
add (dsv-1
dap sv1
lio wrd
sv1, dio xy
sub (dsv-1
svx, jmp xy
ac1, jsp rro
jda cc
jda wro
jmp ami
cc, 0
dap ccx
lac cc
add (dss-1
dap cc2
spa
jmp cc1
cc5, cli
jsp dd
cc2, dac xy
ccx, jmp xy
cc1, lac i cc2 /dss
spq
jmp cc5
add (400000
jmp ccx
/34
/assemble assignment
aa, jsp ar
jsp sv
lio mii
spi i
jmp ami
szf i 6 /dsi
jmp aa1
jda cc
jda mp
jmp ami
aa1, add (dss-1
dap aa2
clc
aa2, dac xy /dss
jmp ami
/write dummy symbol specification
wsp, szf i 4 /liu
jmp ev2
lac (-200000
xct sgn
sub (-200000
dac t1
lac sym
jda sds
jsp uds
add t1
jda pr
jmp evx
/prepare dummy symbol specifications
pr, 0
lio pr
prs, dio .
dap prx
idx prs
sad (dio pdl+ncd
jsp tmp
stf 6 /dsi
prx, jmp xy
/35
/store dummy symbol specification
ss, dap ssx
lac prs
dap sst
lac i lp1
dap prs
sub one
dap ss1
jmp ss2
ss3, jsp sco
jsp scz
ss1, lac xy /pdl
jda wro
ss2, index ss1,sst,ss3
ssx, jmp xy
sst, lac xy
/store word in mai
smb, lac wrd
sza
jmp sm7
lac tea
jmp scz
sm7, jsp sco
lio wrd
lac tea
sm, dap smx
idx mai
dio i mai
lio pss
spi i
jmp sm2
dac hih
sad low
jsp sce
sm2, cla
smx, jmp .
/36
/encode dummy symbol specification
wro, 0
dap wrx
lio wro
law i 7
dac t3
wr0, law wr2
spi
jmp sco
jmp scz
wr2, rir 1s
isp t3
jmp wr0
wrx, jmp .
/decode dummy symbol specification
rro, dap rrx
dzm t2
setup t3,7
rr0, law rr1
jda tc
law 100
rr1, add t2
rar 1s
dac t2
isp t3
jmp rr0
lac t2
lio t2
rrx, jmp xy
/37
/store code bit
sco, dap scx
lac (400000
jmp sc1
scz, dap scx
cla
sc1, dac tc
isp scn
jmp sc4
lac scw
sc3, dac .
lac tc
ral 1s
dac scw
jsp sm
lac mai
dap sc3
lio i sc3
setup scn,22
jmp scx-1
sc4, lac tc
ior scw
ral 1s
dac scw
cla
scx, jmp xy
/test code bit
tc, 0
dap tcx
isp tcn
jmp tc3
jsp rw
setup tcn,22
jmp tc5
tc3, lio tcc
ril 1s
tc5, dio tcc
cla
spi
tcx, jmp xy
jmp i tc
start
7